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Course10810787067 lectures

FPGA Based Signal Processing Systems

Prof. P. Sumathi · IIT Roorkee

Start with lecture 1 At NPTEL

Lectures

Week 1

  1. Introduction to FPGA Video
  2. Technology Review: Part 1 Video
  3. Technology Review: Part 2 Video
  4. DSP and Integrated Design Suites Video
  5. Introduction to Verilog Video

Week 2

  1. Verilog Video
  2. Modelling of Digital Circuits Video
  3. Modelling of Digital Circuits and Testbench: Part 1 Video
  4. Modelling of Digital Circuits and Testbench: Part 2 Video
  5. Testbench, Simulation, and Synthesis Video

Week 3

  1. Structural Modelling of Combinational Logic Video
  2. Dataflow Modelling of Combinational Logic Video
  3. Behavioral Modelling of Combinational Logic Video
  4. Simulation of Combinational Logic Circuits: Part 1 Video
  5. Simulation of Combinational Logic Circuits: Part 2 Video

Week 4

  1. Sequential Logic Circuits: Part 1 Video
  2. Sequential Logic Circuits: Part 2 Video
  3. Blocking and Non-Blocking Statements Video
  4. Sequential Logic Circuits: Blocking and Non-Blocking Statements, Counters Video
  5. Counters and Shift Registers Video

Week 5

  1. Finite State Machines: Part 1 Video
  2. Finite State Machines: Part 2 Video
  3. Finite State Machines: Sequence Detector Video
  4. FSM: Verilog Modules of Sequence Detector Video
  5. FSM: Counters Video

Week 6

  1. Memory Banks Video
  2. FSM Modelling Styles Video
  3. FSM Modelling Styles and Timing Control Video
  4. Timing Controls: Part 1 Video
  5. Timing Controls: Part 2 Video

Week 7

  1. Synthesis of Combinational Logic Circuits Video
  2. Synthesis of Sequential Logic Circuits: Part 1 Video
  3. Synthesis of Sequential Logic Circuits: Part 2 Video
  4. Synthesis of Sequential Logic Circuits: Part 3 Video
  5. Synthesis of Finite State Machines Video

Week 8

  1. Arithmetic Basics : Part 1 Video
  2. Arithmetic Basics : Part 2 Video
  3. Arithmetic Basics : Part 3 Video
  4. CORDIC Video
  5. Timing Analysis Video

Week 9

  1. Finite Impulse Response Filters: Part-1 Video
  2. Finite Impulse Response Filters: Part-2 Video
  3. Finite Impulse Response Filters: Part-3 Video
  4. Finite Impulse Response Filters: Part-4 Video
  5. Digital FIR Filters – Verilog Codes Video

Week 10

  1. Infinite Impulse Response Filters: Part 1 Video
  2. Infinite Impulse Response Filters: Part 2 Video
  3. Infinite Impulse Response Filters: Part 3 Video
  4. Digital IIR Filters: Verilog Codes - Part 1 Video
  5. Digital IIR Filters: Verilog Codes - Part 2 Video

Week 11

  1. DFT Video
  2. Sliding DFT and its Variants: Part 1 Video
  3. Sliding DFT and its Variants : Part 2 Video
  4. DCT Video
  5. FFT and DSP Builder Models Video

Week 12

  1. General Discrete-Signal Processing Network : Part 1 Video
  2. General Discrete-Signal Processing Network : Part 2 Video
  3. Adaptive Filtering : Part 1 Video
  4. Adaptive Filtering : Part 2 Video
  5. Adaptive Filtering : Part 3 Video

Lab Videos

  1. Combinational Logic Circuits: Simulation Video
  2. Sequential Logic Circuits: Simulation Video
  3. Finite State Machines: Simulation Video
  4. Timing Controls: Simulation Video
  5. Lab 1 Part 2 : Combinational Logic Circuits: Implementation Video
  6. Lab 2: Part 2: Sequential Logic Circuits: Implementation Video
  7. Lab 3: Part 2: Finite State Machines: Implementation Video

Syllabus and materials

At NPTEL, as the course publishes them.

Credits and licence

Institution
IIT Roorkee
Department
Electrical Engineering
Teacher
Prof. P. Sumathi
Level
Undergraduate
Language
English
Subjects
Engineering
Source
NPTEL
Licence
CC BY-NC-SA, as NPTEL states it. Non-commercial use only. NPTEL's terms
Attribution
NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
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