Learn · Computer Architecture and Organization
Lecture 16 of 64Week 3
Lecture 16: Amadahl’s Law (Part 2)
Prof. Indranil Sengupta and Prof. Kamalika Datta · IIT Kharagpur
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- Computer Architecture and Organization, IIT Kharagpur (at NPTEL)
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- CC BY-NC-SA, as NPTEL states it. Non-commercial use only.
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All the lectures
- Lecture 1: Evolution of Computer Systems
- Lecture 2: Basic Operation of A Computer
- Lecture 3: Memory Addressing and Languages
- Lecture 4: Software and Architecture Types
- Lecture 5: Instruction Set Architecture
- Lecture 6: Number Representation
- Lecture 7: Instruction Format and Addressing Modes
- Lecture 8: CISC and RISC Architecture
- Lecture 9: MIPS32 Instruction Set
- Lecture 10: MIPS Programming Examples
- Lecture 11: SPIM – A MIPS32 Simulator
- Lecture 12: Measuring CPU Performance
- Lecture 13: Choice of Benchmarks
- Lecture 14: Summarizing Performance Results
- Lecture 15: Amadahl’s Law (Part 1)
- Lecture 16: Amadahl’s Law (Part 2)
- Lecture 17: Design of Control Unit (Part - 1)
- Lecture 18: Design of Control Unit (Part - 2)
- Lecture 19: Design of Control Unit (Part - 3)
- Lecture 20: Design of Control Unit (Part - 4)
- Lecture 21: Implementation of MIPS32 (Part - 1)
- Lecture 22: Implementation of MIPS32 (Part - 2)
- Lecture 23: Processor Memory Interaction
- Lecture 24: Static and Dynamic RAM
- Lecture 25: Asynchronous DRAM
- Lecture 26: Synchronous DRAM
- Lecture 27: Memory Interfacing and Addressing
- Lecture 28: Memory Hierarchy Design
- Lecture 29: Memory Hierarchy Design (Contd.)
- Lecture 30: Cache Memory (Part - 1)
- Lecture 31: Cache Memory (Part - 2)
- Lecture 32: Improving Cache Performance
- Lecture 33: DESIGN OF ADDERS (PART 1)
- Lecture 34: DESIGN OF ADDERS (PART 2)
- Lecture 35: DESIGN OF MULTIPLIERS (PART 1)
- Lecture 36: DESIGN OF MULTIPLIERS (PART 2)
- Lecture 37: DESIGN OF DIVIDERS
- Lecture 38: FLOATING-POINT NUMBERS
- Lecture 39: FLOATING-POINT ARITHMETIC
- Lecture 40: BASIC PIPELINING CONCEPTS
- Lecture 41: PIPELINE SCHEDULING
- Lecture 42: ARITHMETIC PIPELINE
- Lecture 43: SECONDARY STORAGE DEVICES
- Lecture 44: INPUT-OUTPUT ORGANIZATION
- Lecture 45: DATA TRANSFER TECHNIQUES
- Lecture 46: INTERRUPT HANDLING (PART 1)
- Lecture 47: INTERRUPT HANDLING (PART 2)
- Lecture 48: DIRECT MEMORY ACCESS
- Lecture 49: SOME EXAMPLE DEVICE INTERFACING
- Lecture 50: EXERCISES ON I/O TRANSFER
- Lecture 51: BUS STANDARDS
- Lecture 52: Universal Serial Bus (USB)
- Lecture 53: PIPELINING THE MIPS32 DATA PATH
- Lecture 54: MIPS PIPELINE (Contd.)
- Lecture 55: PIPELINE HAZARDS (PART 1)
- Lecture 56: PIPELINE HAZARDS (PART 2)
- Lecture 57: PIPELINE HAZARDS (PART 3)
- Lecture 58: PIPELINE HAZARDS (PART 4)
- Lecture 59: MULTICYCLE OPERATIONS IN MIPS32
- Lecture 60: EXPLOITING INSTRUCTION LEVEL PARALLELISM
- Lecture 61: VECTOR PROCESSORS
- Lecture 62: MULTI-CORE PROCESSORS
- Lecture 63: SOME CASE STUDIES
- Lecture 64: SUMMARIZATION OF THE COURSE