Course10610516364 lectures
Computer Architecture and Organization
Prof. Indranil Sengupta and Prof. Kamalika Datta · IIT Kharagpur
About
This course will discuss the basic concepts of computer architecture and organization that can help the participants to have a clear view as to how a computer system works. Examples and illustrations will be mostly based on a popular Reduced Instruction Set Computer (RISC) platform. Illustrative examples and illustrations will be provided to convey the concepts and challenges to the participants. Starting from the basics, the participants will be introduced to the state-of-the-art in this field.
INTENDED AUDIENCE : Computer Science and Engineering ; Information Technology ; Electronics and Communication Engineering ;Electrical Engineering
PREREQUISITES : Basic concepts in digital circuit design, Familiarity with a programming language like C or C++
INDUSTRY SUPPORT : TCS ; Wipro ; CTS ; Google ; Microsoft ; HP ; Intel
Lectures
Week 1
- Lecture 1: Evolution of Computer Systems
- Lecture 2: Basic Operation of A Computer
- Lecture 3: Memory Addressing and Languages
- Lecture 4: Software and Architecture Types
- Lecture 5: Instruction Set Architecture
Week 2
- Lecture 6: Number Representation
- Lecture 7: Instruction Format and Addressing Modes
- Lecture 8: CISC and RISC Architecture
- Lecture 9: MIPS32 Instruction Set
- Lecture 10: MIPS Programming Examples
- Lecture 11: SPIM – A MIPS32 Simulator
Week 3
- Lecture 12: Measuring CPU Performance
- Lecture 13: Choice of Benchmarks
- Lecture 14: Summarizing Performance Results
- Lecture 15: Amadahl’s Law (Part 1)
- Lecture 16: Amadahl’s Law (Part 2)
Week 4
- Lecture 17: Design of Control Unit (Part - 1)
- Lecture 18: Design of Control Unit (Part - 2)
- Lecture 19: Design of Control Unit (Part - 3)
- Lecture 20: Design of Control Unit (Part - 4)
- Lecture 21: Implementation of MIPS32 (Part - 1)
- Lecture 22: Implementation of MIPS32 (Part - 2)
Week 5
- Lecture 23: Processor Memory Interaction
- Lecture 24: Static and Dynamic RAM
- Lecture 25: Asynchronous DRAM
- Lecture 26: Synchronous DRAM
- Lecture 27: Memory Interfacing and Addressing
Week 6
- Lecture 28: Memory Hierarchy Design
- Lecture 29: Memory Hierarchy Design (Contd.)
- Lecture 30: Cache Memory (Part - 1)
- Lecture 31: Cache Memory (Part - 2)
- Lecture 32: Improving Cache Performance
Week 7
- Lecture 33: DESIGN OF ADDERS (PART 1)
- Lecture 34: DESIGN OF ADDERS (PART 2)
- Lecture 35: DESIGN OF MULTIPLIERS (PART 1)
- Lecture 36: DESIGN OF MULTIPLIERS (PART 2)
- Lecture 37: DESIGN OF DIVIDERS
Week 8
- Lecture 38: FLOATING-POINT NUMBERS
- Lecture 39: FLOATING-POINT ARITHMETIC
- Lecture 40: BASIC PIPELINING CONCEPTS
- Lecture 41: PIPELINE SCHEDULING
- Lecture 42: ARITHMETIC PIPELINE
Week 9
- Lecture 43: SECONDARY STORAGE DEVICES
- Lecture 44: INPUT-OUTPUT ORGANIZATION
- Lecture 45: DATA TRANSFER TECHNIQUES
- Lecture 46: INTERRUPT HANDLING (PART 1)
- Lecture 47: INTERRUPT HANDLING (PART 2)
Week 10
- Lecture 48: DIRECT MEMORY ACCESS
- Lecture 49: SOME EXAMPLE DEVICE INTERFACING
- Lecture 50: EXERCISES ON I/O TRANSFER
- Lecture 51: BUS STANDARDS
- Lecture 52: Universal Serial Bus (USB)
Week 11
- Lecture 53: PIPELINING THE MIPS32 DATA PATH
- Lecture 54: MIPS PIPELINE (Contd.)
- Lecture 55: PIPELINE HAZARDS (PART 1)
- Lecture 56: PIPELINE HAZARDS (PART 2)
- Lecture 57: PIPELINE HAZARDS (PART 3)
- Lecture 58: PIPELINE HAZARDS (PART 4)
Week 12
Syllabus and materials
At NPTEL, as the course publishes them.
Credits and licence
- Institution
- IIT Kharagpur
- Department
- Computer Science and Engineering
- Taught by
- Prof. Indranil Sengupta, Prof. Kamalika Datta
- Level
- Undergraduate
- Language
- English
- Subjects
- Computer science, Engineering
- Source
- NPTEL
- Licence
- CC BY-NC-SA, as NPTEL states it. Non-commercial use only. NPTEL's terms
- Attribution
- NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
- Who can watch
- NPTEL gives no rating. Invisible Network shows it to Tweens profiles and older, judged from what the source says about it. How courses are placed