Lecture 17 of 42Advanced VLSI Design
L17-Introduction to Hardware Description Languages
Prof. D.K. Sharma and others · IIT Bombay
Credits and licence
- From
- Advanced VLSI Design, IIT Bombay (at NPTEL)
- Licence
- CC BY-NC-SA, as NPTEL states it. Non-commercial use only.
- Attribution
- NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
- Who can watch
- Teens profiles and older. How courses are placed
All the lectures
- L1-Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design
- L2-Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design - Part II
- L3-Logical Effort - A way of Designing Fast CMOS Circuits
- L4-Logical Effort - A way of Designing Fast CMOS Circuits continued
- L5-Logical Effort - A way of Designing Fast CMOS Circuits -Part III
- L6-Power Estimation and Control in CMOS VLSI circuits
- L7-Power Estimation and Control in CMOS VLSI circuits continued
- L8-Low Power Design Techniques
- L9-Low Power Design Techniques -Part II
- L10-Arithmetic Implementation Strategies for VLSI
- L11-Arithmetic Implementation Strategies for VLSI -Part II
- L12-Arithmetic Implementation Strategies for VLSI -Part III
- L13-Arithmetic Implementation Strategies for VLSI -Part IV
- L14-Interconnect aware design: Impact of scaling, buffer insertion and inductive peaking
- L15-Interconnect aware design: Low swing and Current mode signaling
- L16-Interconnect aware design: capacitively coupled interconnects
- L17-Introduction to Hardware Description Languages
- L18-Managing concurrency and time in Hardware Description Languages
- L19-Introduction to VHDL
- L20-Basic Components in VHDL
- L21-Structural Description in VHDL
- L22-Behavioral Description in VHDL
- L23-Introduction to Verilog
- L24-FSM + datapath (GCD example)
- L25-FSM + datapath (continued)
- L26-Single Cycle MMIPS
- L27-Multicycle MMIPS
- L28-Multicycle MMIPS – FSM
- L29-Brief Overview of Basic VLSI Design Automation Concepts
- L30-Netlist and System Partitioning
- L31-Timing Analysis in the context of Physical Design Automation
- L32-Placement algorithm
- L33-Introduction to VLSI Testing
- L34-VLSI Test Basics - I
- L35-VLSI Test Basics - II
- L36-VLSI Testing: Automatic Test Pattern Generation
- L37-VLSI Testing: Design for Test (DFT)
- L38-VLSI Testing: Built-In Self-Test (BIST)
- L39-VLSI Design Verification: An Introduction
- L40-VLSI Design Verification: An Introduction
- L41-VLSI Design Verification: Equivalence/Model Checking
- L42-VLSI Design Verification: Model Checking