Lecture 92 of 132week-08
W08L05pMOSConstCurrentBias
Prof. Nagendra Krishnapura · IIT Madras
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- Analog Circuits, IIT Madras (at NPTEL)
- Licence
- CC BY-NC-SA, as NPTEL states it. Non-commercial use only.
- Attribution
- NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
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All the lectures
- W01L01Intro
- W01L02PowerAmpSingleSource
- W01L03PowerAmpLin2Port
- W01L04OnePortNonlinearity
- W01L05NLCktAnalysis
- W01L06IncrementalAnalysisGraphical
- W01L07IncrementalAnalysisEq
- W01L08IncrementalEqCkt
- W01L09DiodeLargeSignalChar
- W01L10DiodeAnalysisExample
- W01L11DiodeSmallSignalModel
- W02L01TwoPortNonlinearity
- W02L02TwoPortSmallSignalEq
- W02L03TwoPortSmallSignalEqCkt
- W02L04TwoPortGain
- W02L05MaxGainConstraintSmallSignal
- W02L06MaxGainConstraintLargeSignal
- W02L07ConstraintExplanation
- W02L08MOSTransistor
- W02L09MOSLargeSignalChar
- W02L10MOSLargeSignalCharSketch
- W02L11MOSSmallSignalChar
- W02L12MOSLinearRegion
- W02L13MOSSmallSignalAmp
- W03L01MOSBasicAmplifier
- W03L02MOSBasicAmplifierProblems
- W03L03ACCoupling
- W03L04CommonSourceAmplifier
- W03L05CSAmpSSeq
- W03L06CSAmplifierAnalysis
- W03L07InputCouplingCap
- W03L08OutputCouplingCap
- W03L09ChannelLengthModulation
- W03L10SmallSignalgds
- W03L11CSAmpWgds
- W04L01gmVariations
- W04L02ConstVGSvsConstId
- W04L03NegfbControl
- W04L04BiasFeedbackTypes
- W04L05DrainFeedback
- W04L06DrainFBExplanation
- W04L07CSAmpWDrainFB
- W04L08RGConstraint
- W04L09DrainFBC1Constraint
- W04L10DrainFBC2Constraint
- W04L11RiRoCSAmpConstVBias
- W04L12CurrentMirror
- W04L13CSAmpWCurrentMirrorBias
- W04L14CSAmpWCurMirBiasCapConstraints
- W04L15DiodeConnectedTransistor
- W05L01SourceFeedbackBias
- W05L02CSAmplifierWSourceFBBias
- W05L03CSAmpCapConstraints
- W05L04Drain2SourceFB
- W05L05Source2GateFB
- W05L06SaturationCondition
- W05L07ResistorSubstitution
- W05L08ControlledSourcesIntro
- W05L09MOSVCVSIntro
- W05L10MOSVCVSSynthesis
- W05L11SourceFollowerSmallSignal
- W05L12SourceFollowerFull
- W05L13SourceFollowerCapConstraints
- W06L01VCCS
- W06L02VCCSSmallSignal
- W06L03VCCSComplete
- W06L04VCCSACCoupledLoad
- W06L05SourceDegeneration
- W06L06CCCSSynthesis
- W06L07CCCSSmallSignal
- W06L08CBAmplifierComplete
- W06L09CCVSSynthesis
- W06L10CCVSGain
- W06L11CCVSRiRo
- W06L12CCVSBiasing
- W07L01OpampVCVS
- W07L02OpampCCVS
- W07L03OpampVirtualShort
- W07L04TransistorVirtualShort
- W07L05ControlledSourcesComment
- W07L06AmplifierSummary
- W07L07OtherDevices
- W07L08SwingLimitsIntro
- W07L09SwingLimitsSaturation
- W07L10SwingLimitsCutoff
- W07L11SwingLimitsExample
- W07L12SwingLimitsVoltageLevels
- W08L01pMOSIntro
- W08L02pMOSSmallSignalModel
- W08L03pMOSCSAmp
- W08L04pMOSCSAmpSwingLimits
- W08L05pMOSConstCurrentBias
- W08L06nMOSTopMOS
- W08L07BiasCurrentGeneration
- W08L08FeedbackExamples
- W09L01CSGainLimits
- W09L02CSActiveLoad
- W09L03CMOSInverter
- W09L04pMOSCSChar
- W09L05nMOSCSChar
- W09L06CMOSInvChar
- W09L07AmpDigitalGates
- W09L08BiasSensitivity
- W09L09SelfBias
- W09L10Application
- W09L11SelfBiasInvSupplyCurrent
- W10L01DiffPair
- W10L02DiffPairSmallSignalBasics
- W10L03DiffPairBiasing
- W10L04DiffInput
- W10L05DiffPairActiveLoad
- W10L06DiffPairActiveLoadOP
- W10L07DiffPairActiveLoadIN
- W10L08DiffPairActiveLoadRN
- W10L09DiffPairCMGAin
- W10L10SingleStageOpamp
- W10L11SingleStageOpampCMSwingLimits
- W10L12SingleStageOpampDiffSwingLimits
- W11L01SecondStageType
- W11L02TwoStageOpampGain
- W11L03OpampClosedLoopBiasing
- W11L06TwoStageOpampClosedLoopBiasing
- W11L04TwoStageOpampSmallSignalModel2
- W11L05TwoStageOpampSwingLimits
- W11L07SystematicOffset
- W12L01BJTLargeSignalModel
- W12L02BJTOpPointCalc
- W12L03BJTSmallSignalModel
- W12L04BJTBiasing
- W12L05BJTBiasing2
- W12L06BJTAmplifiers
- W12L07PNPBJT