Learn · Computer System Optimizations for ML
Lecture 50 of 60Week 10 GNN Accelerator
Chiplet-Based Heterogeneous Architectures for LLM Acceleration
Prof. Sumit K. Mandal · IISc Bangalore
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- Computer System Optimizations for ML, IISc Bangalore (at NPTEL)
- Licence
- CC BY-NC-SA, as NPTEL states it. Non-commercial use only.
- Attribution
- NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
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- Tweens profiles and older. How courses are placed
All the lectures
- Introduction to the course
- Neural Networks
- Introduction to Convolutional Neural Network - 1
- Introduction to Convolutional Neural Network - 2
- Convolutional Neural Network-1
- Convolutional Neural Network-2
- Convolutional Neural Network-3
- Canonical CNN Architectures - 1
- Canonical CNN Architectures - 2
- CNN Computational Optimization Techniques
- Dataflow for CNN Execution - 1
- Dataflow for CNN Execution - 2
- CNN Accelerators - 1
- CNN Accelerators 2
- CNN Accelerators 3
- CNN Accelerators 4
- CNN prunning - 1
- CNN pruning - 2
- Parallelism in CNN - 1
- Parallelism in CNN - 2
- Parallelism in CNN - 3
- Parallelism in CNN - 4
- Parallelism in CNN - 5
- LLMs-1
- LLMs-2
- LLMs-3
- LLMs-4
- LLMs-5
- LLMs-6
- LLMs-7
- LLMs-8
- LLMs-9
- LLMs-10
- Distributed Service
- Fault Tolerance
- Fault-Tolerant Training
- Fundamentals of Graph Neural Networks-1
- Fundamentals of Graph Neural Networks-2
- Hardware Acceleration of Graph Neural Networks-1
- Hardware Acceleration of Graph Neural Networks -2
- ISSAC, Pipelayer
- Pipelayer[contd.], Atomlayer, Simulation platform
- Simulation platform, Area-aware optimization, communication-aware optimization
- Communication-Aware optimization, Achieving minimum communication latency
- Achieving minimum communication latency
- Advanced Hardware Architectures for GNN Acceleration
- Communication-Aware Pruning for IMC
- Re-Transformer
- Performance Evaluation of 2.5D IMC-Based AI Accelerators
- Chiplet-Based Heterogeneous Architectures for LLM Acceleration
- Chiplet-Based Heterogeneous Architectures for LLM Acceleration
- Performance Characterization
- Performance Characterization of Deep Learning Workloads - Part 1
- Performance Characterization of Deep Learning Workloads - Part 2
- Performance Characterization of Deep Learning Workloads - Part 3
- Introduction to AMD Neural Processing Unit (NPU)
- Introduction to AMD Neural Processing Unit (NPU)[contd.]
- Acceleration of ML operation with GPUs
- Training Large model with limited GPU memory
- Recap of the course