Course10610335971 lectures
Parallel Computer Architecture
Prof. Hemangee K. Kapoor · IIT Guwahati
Lectures
Week 1: Introduction to Parallel Architectures
- Lec 1: Why do we need parallel architecture ?
- Lec 2: Multicore Revolution
- Lec 3: What is Parallel Architecture?
- Lec 4: Performance and Benchmarking
- Lec 5: Reporting Results
- Lec 6: Some Laws
Week 2: Introduction to Parallel Architecture
- Lec 7: A shift from sequential to parallel
- Lec 8: Programming Models
- Lec 9: Shared Memory Paradigm
- Lec 10: Message Passing Paradigm
- Lec 11: Examples
- Lec 12: Cache Basics
Week 3: Memory Hierarchy
- Lec 13: Memory hierarchy questions (1)
- Lec 14: Memory hierarchy questions (2)
- Lec 15: Six basic cache optimisations (1)
- Lec 16: Six basic cache optimisations (2)
- Lec 17: Virtual Memory (1)
- Lec 18: Virtual Memory (2)
Week 4: Cache Coherence
- Lec 19: Cache Coherence Problem
- Lec 20: Concept of Serialisation
- Lec 21: Coherence related Conditions
- Lec 22: Types of Coherence Protocols (1)
- Lec 23: Types of Coherence Protocols (2)
- Lec 24: VI Protocol
- Lec 25: 3 state: MSI Protocol
Week 5: Cache Coherence
- Lec 26: MESI Protocol
- Lec 27: Dragon Protocol
- Lec 28: Coherence misses
- Lec 29: Coherence misses example
- Lec 30: Correctness Requirements
Week 6: Snoop based muliprocessor design
- Lec 31: Single-Level caches with an Atomic Bus (1)
- Lec 32: Single-Level caches with an Atomic Bus (2)
- Lec 33: Multi-Level caches with an Atomic Bus (1)
- Lec 34: Multi-Level caches with an Atomic Bus (2)
- Lec 35: Split transaction Bus
- Lec 36: Phases in Split Transaction Bus
Week 7: Scalable Shared Memory Systems
- Lec 37: Request table and Organization
- Lec 38: Path of a Cache Miss
- Lec 39: Multi-Level cache + Split transaction Bus
- Lec 40: Introduction to Directory Cache Coherence
- Lec 41: Basic Operation of a Directory
Week 8: Scalable Shared Memory Systems
- Lec 42: Directory Organisations
- Lec 43: Directory Overhead Optimisations
- Lec 44: Directory Protocol optimisations
- Lec 45:Proving Correctness (1)
- Lec 46: Proving Correctness (2)
Week 9: Directory Coherence: Case Studies
- Lec 47: SGI Origin Architecture
- Lec 48: Working of protocol
- Lec 49: Correctness Issues
- Lec 50: Sequent NUMA-Q Architecture
- Lec 51: Working of protocol(1)
Week 10: Memory Consistency
- Lec 52: Working of protocol (2)
- Lec 53: Correctness and Protocol Interaction
- Lec 54: Sequential Consistency
- Lec 55: Implications of Sequential Consistency
Week 11: Synchronisation
- Lec 56: Relaxed Consistency Models (1)
- Lec 57: Relaxed Consistency Models (2)
- Lec 58: Relaxing all Orders
- Lec 59: Uninterruptible Instructions
- Lec 60: Implementation of atomic instructions
- Lec70: Other synchronisation options
Week 12: Interconnection Networks
Live Session
Syllabus and materials
At NPTEL, as the course publishes them.
Credits and licence
- Institution
- IIT Guwahati
- Department
- Computer Science and Engineering
- Teacher
- Prof. Hemangee K. Kapoor
- Level
- Undergraduate
- Language
- English
- Subjects
- Computer science, Engineering
- Source
- NPTEL
- Licence
- CC BY-NC-SA, as NPTEL states it. Non-commercial use only. NPTEL's terms
- Attribution
- NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
- Who can watch
- NPTEL gives no rating. Invisible Network shows it to Tweens profiles and older, judged from what the source says about it. How courses are placed
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