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Course10610322945 lectures

C-Based VLSI Design

Prof. Chandan Karfa · IIT Guwahati

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About

This course discussed how a C code can be automatically translated into register transfer level (RTL) design using high-level synthesis (HLS). HLS is an active domain of research in recent times in the domain of electronic Design Automation (EDA) of VLSI. This course will help the student to: (i) understand the overall HLS flow, (ii) how a C-code will be converted to its equivalent hardware, (iii) how to write c-code for efficient hardware generation and (iv) how the common software compiler optimization can help to improve the circuit performance. Also, advanced topics like HLS for FPGA targets, HLS for Security, optimizations at RTL level and verification challenges of HLS will be covered. This course will help the student to take up research in the domain of HLS. Also, this course will help the student to become proficient for EDA industries.

Intended audience: Final year BTech Student, MTech and PhD students, engineers from VLSI industries

Prerequisites: Basic knowledge of digital design Basic knowledge of Data structures and algorithmsBasic knowledge of Verilog. The students may go through the first six lectures of https://nptel.ac.in/courses/106/105/106105083/ to learn Verilog.

Lectures

Week 1: Introduction to C-based VLSI Design

  1. Lec 1: Introduction to C-Based VLSI Design YouTube
  2. Lec 2: C-based VLSI Design: An Overview YouTube
  3. Lec 3: C-based VLSI Design: Problem Formulation YouTube
  4. Lec 4: C-based VLSI Design: Course Plan YouTube

Week 2: C-Based VLSI Design: Basic Scheduling

  1. Lec 1: Introduction to Scheduling YouTube
  2. Lec 2: ILP formulation of Scheduling YouTube
  3. Lec 3: ILP formulation of MRLC and MLRC Scheduling YouTube

Week 3: C-Based VLSI Design: List Based Scheduling

  1. Lec 1: Multiprocessor Scheduling YouTube
  2. Lec 2: Hu’s algorithm for Multiprocessor Scheduling YouTube
  3. Lec 3: List based Scheduling of MLRC YouTube
  4. Lec 4: List based Scheduling of MRLC YouTube

Week 4: C-Based VLSI Design: Advanced Scheduling

  1. Lec1: Forced Directed Scheduling YouTube
  2. Lec2: Forced Directed MLRC and MRLC Scheduling Algorithm YouTube
  3. Lec3: Path Based Scheduling YouTube
  4. Lec4: Path Based Scheduling YouTube

Week 5: C-Based VLSI Design: Allocation and Binding

  1. Lec 1: Allocation and Binding Problem Formulation YouTube
  2. Lec 2: Left Edge Algorithm YouTube
  3. Lec 3: ILP Based Formulation YouTube
  4. Lec 4: Allocation and Binding of Hierarchical Graph YouTube

Week 6: C-Based VLSI Design: Allocation, Binding, Data-path and Controller Generation

  1. Lec 1: Register Allocation and Binding YouTube
  2. Lec 2: Multi-port Binding Problem YouTube
  3. Lec 3: Data-path and Controller Synthesis YouTube

Week 7: C-Based VLSI Design: Efficient Synthesis of C Code

  1. Lec 1: HLS for Arrays YouTube
  2. Lec 2: HLS for Loops YouTube
  3. Lec3: HLS for Loop - pipeline YouTube

Week 8: C-Based VLSI Design: Hardware Efficient C Coding

  1. Lec1: Hardware Efficient C Coding YouTube
  2. Lec2: Hardware Efficient C Coding – part II YouTube
  3. Lec3: Dataflow Optimization in HLS YouTube
  4. Tutorial 1 - High-Level Synthesis with Vivado HLS YouTube
  5. Tutorial 2 - High-Level Synthesis Optimizations with Vivado HLS YouTube

Week 9: C-Based VLSI Design: Impact of Compiler Optimizations in Hardware

  1. Lec1: Frontend Optimizations in C YouTube
  2. Lec 2: HLS Optimizations: Case Study 1 YouTube
  3. Lec 3: HLS Optimizations: Case Study 2 YouTube

Week 10: Verification of High-level Synthesis

  1. Lec 1: Simulation Based Verification YouTube
  2. Lec 2: RTL to C Reverse Engineering YouTube
  3. Lec 3: Phase-wise Verification of HLS YouTube
  4. Lec 4: Equivalence between C and RTL YouTube

Week 11: Securing Design with High-level Synthesis

  1. Lec 1: Introduction to Hardware Security YouTube
  2. Lec 2: HLS for Security YouTube
  3. Lec 3: Attacks on RTL Logic locking YouTube

Week 12: Introduction to EDA and Recent Advances in C-Based VLSI Design

  1. Lec 1: Introduction to Logic Synthesis YouTube
  2. Lec 2: FPGA Technology Mapping YouTube
  3. Lec 3: Introduction to Physical Synthesis YouTube
  4. Lec 4: Introduction to Circuit optimizations YouTube
  5. Lec 5: Recent Advances in C-Based VLSI Design YouTube

Syllabus and materials

At NPTEL, as the course publishes them.

Credits and licence

Institution
IIT Guwahati
Department
Computer Science and Engineering
Teacher
Prof. Chandan Karfa
Level
Undergraduate
Language
English
Subjects
Computer science, Engineering
Source
NPTEL
Licence
CC BY-NC-SA, as NPTEL states it. Non-commercial use only. NPTEL's terms
Attribution
NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
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