Course10610318236 lectures
Embedded Systems-Design Verification and Test
Prof. Santosh Biswas, Prof. Jatindra Kumar Deka and Prof. Arnab Sarkar · IIT Guwahati
Lectures
Week 1:Introduction and Modeling
Week 2: Modeling and Synthesis issues
Week 3: Architectural Synthesis of Hardwares
- Hardware Architectural Synthesis - 1
- Hardware Architectural Synthesis - 2
- Hardware Architectural Synthesis - 3
- Hardware Architectural Synthesis - 4
- Hardware Architectural Synthesis - 5
- Hardware Architectural Synthesis - 6
- Hardware Architectural Synthesis - 7
Week 4: System-level Design
- System Level Analysis
- Uniprocessor Scheduling - 1
- Uniprocessor Scheduling - 2
- Multiprocessor Scheduling - 1
- Multiprocessor Scheduling - 2
Week 5: Temporal Logic
Week 6:Model Checking
Week 7: BDD and Symbolic Model Checking
Week 8: Introduction to Digital Testing
Week 9: Introduction to Digital Testing & Embedded System hardware Testing
- Scan Chain based Sequential Circuit Testing
- "Software-Hardware Co-validation Fault Models and High Level Testing for Complex Embedded Systems"
Week 10: Embedded System hardware Testing
Week 11: Advances in Embedded System hardware Testing
Week 12: Advances in Embedded System hardware Testing & Testing for Embedded Software Systems
Syllabus and materials
At NPTEL, as the course publishes them.
Credits and licence
- Institution
- IIT Guwahati
- Department
- Computer Science and Engineering
- Taught by
- Prof. Santosh Biswas, Prof. Jatindra Kumar Deka, Prof. Arnab Sarkar
- Level
- Undergraduate
- Language
- English
- Subjects
- Computer science, Engineering
- Source
- NPTEL
- Licence
- CC BY-NC-SA, as NPTEL states it. Non-commercial use only. NPTEL's terms
- Attribution
- NPTEL states: "Distributed under Creative Commons Attribution-ShareAlike / CC BY - NC - SA", beside a BY-NC-SA badge.
- Who can watch
- NPTEL gives no rating. Invisible Network shows it to Tweens profiles and older, judged from what the source says about it. How courses are placed
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