Porting MADGRAPH to FPGA using High-Level Synthesis (HLS)

Name: Porting MADGRAPH to FPGA using High-Level Synthesis (HLS)
Duration: 16 min 25 s
Channel: Hector Gutierrez Arance

Hector Gutierrez Arance · CERN

Credits and licence

From: Porting MADGRAPH to FPGA using High-Level Synthesis (HLS), CERN (at CERN)
Licence: CERN, as CERN states it.
Attribution: © CERN. CERN provides its audiovisual media free of charge for educational and informational use, credited to CERN; this lecture is shown in CERN's own player.
Who can watch: Teens profiles and older. How courses are placed