Reiner Pope of MatX on accelerating AI with transformer-optimized chips
· 1 h 13 min · Episode 25
Episode Reiner Pope of MatX on accelerating AI with transformer-optimized chips
Reiner Pope is the co-founder and CEO of MatX, designing specialized chips for Large Language Models. A former Google TPU architect, he joins John to discuss why the current generation of AI hardware is hitting a wall. They cover the "uncomfortable trade-off" between latency and throughput for current chips, why MatX is betting on combining HBM and SRAM to solve it, and the massive logistical challenge of manufacturing chips at scale with TSMC. Reiner also shares his predictions for AI in 2027, why he prefers Rust for hardware design, and why the best iteration loops happen in your head before writing a line of code.
Timestamps (00:00:15) Google’s AI revival
(00:07:54) MatX
(00:17:11) AI supply chain
(00:21:48) Designing chips
(00:37:11) TSMC
(00:44:17) Token pricing
(00:44:55) RL-ing chip design
(00:49:26) Design to production
(00:56:05) MatX culture
(01:02:57) Rust
(01:05:21) Cuckoo hashing
(01:09:35) Unexplored model architectures
Transcript
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