About
GateMate FPGA from Cologne Chip [1] is natively supported by FOSS development tools (Yosys and nextpnr). The GateMate FPGA has a transceiver capable of communication at 5  Gbps. However, no open and free USB 3.x core is available for it. I'm running a project to implement a USB on the GateMate FPGA.
A hardware platform [2] (FPGA module and an adapter board) is designed, produced, and initially operated. An IP and firmware development is in the active phase.
The talk discusses the project scope, achieved results, and technical challenges. It is expected that by the time of the conference, a live demonstration will be possible.
The project is supported by the NLnet foundation [3].
[1] https://colognechip.com/programmable-logic/gatemate/ [2] https://www.gmm7550.dev/ [3] https://nlnet.nl/project/GateMate-USB3-PHY/
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The talk
Credits and licence
- Institution
- CERN
- Speaker
- Anton Kuzmin
- Year
- 2026
- Language
- English
- Source
- CERN
- Licence
- CERN, as CERN states it. CERN's terms
- Attribution
- © CERN. CERN provides its audiovisual media free of charge for educational and informational use, credited to CERN; this lecture is shown in CERN's own player.
- Who can watch
- CERN gives no rating. Invisible Network shows it to Teens profiles and older, judged from what the source says about it. How courses are placed