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Talk57 min

Data Processing with FPGAs: Parallel Computing on Compact Configurable Logic

Peter Hinderberger · CERN

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About

In particle physics, Field-Programmable Gate Arrays (FPGAs) play an increasing role in acquiring, processing, and filtering data at experiments with high data rates. Today their advanced technology allows for complex processing, rather than just being used as glue logic on the hardware level. The high degree of parallelism, flexibility, and number of IOs in combination with low power consumption and size make them a valid choice for many applications in science and industry.

A drawback is the high complexity of designing efficient and optimized firmware using Hardware Description Languages (HDL). High-Level Synthesis (HLS) approaches, however, gain more and more popularity. They allow for comparatively simple and effective implementation of complex algorithms, for example in real-time image processing or deep learning.

In this lecture, I will discuss how FPGAs operate, their building blocks, properties, advantages, challenges, and general feasibility in an experimental context. I will go through the general process of designing logic on the RTL level with a beginner-friendly code example to provide a more tangible treatment. Recent developments, comparisons to other widely used computing architectures, and exemplary use cases will conclude with a short view of HLS as an alternative approach suitable for software engineers..

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The talk

  1. Data Processing with FPGAs: Parallel Computing on Compact Configurable Logic 2025-03-27 · 57 min · CERN's player

Credits and licence

Institution
CERN
Department
Inverted CSC
Speaker
Peter Hinderberger
Year
2025
Language
English
Subjects
Computer science
Source
CERN
Licence
CERN, as CERN states it. CERN's terms
Attribution
© CERN. CERN provides its audiovisual media free of charge for educational and informational use, credited to CERN; this lecture is shown in CERN's own player.
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