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Talk27 min

A low latency Gated Recurrent Unit Implementation for the AMD Versal AI Engine

Michail Sapkas · CERN

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About

Trying to modulate the RF cavity of a Synchrotron Light Source by leveraging Reinforcement Learning, resulted in a hardware implementation of the Gated Recurrent Unit (GRU) on the Versal AI Engine, by AMD Xilinx and extremely efficient in performing the main numerical operations needed by the model.

RNNs have been designed to handle time series, and they are the perfect candidates to handle this kind of task. Although RNNs don't parallelize well, their ability to distill input and pass information into the hidden state, could be beneficial for real time control tasks. I will firstly introduce the AI Engine and its features. Second, I will introduce the GRU cell. Then I will show how numerical operations are being implemented in the AI Engine and its memory limitations. Finally, I will discuss how we tackled the lack of built-in activation functions, since the tanh and sigmoid function implementations are needed..

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The talk

  1. A low latency Gated Recurrent Unit Implementation for the AMD Versal AI Engine 2025-05-21 · 27 min · CERN's player

Credits and licence

Institution
CERN
Department
FPGA Developers' Forum (FDF)
Speaker
Michail Sapkas
Year
2025
Language
English
Source
CERN
Licence
CERN, as CERN states it. CERN's terms
Attribution
© CERN. CERN provides its audiovisual media free of charge for educational and informational use, credited to CERN; this lecture is shown in CERN's own player.
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