About
Testing an FPGA design is complex and time consuming. Testing the main payload of an ESA mission spacecraft much more so. While modern HDL languages have powerful test capabilities, they can hardly match the unbounded facilities provided by Python. We have thus devised a flexible, cocotb-based framework for the task, in which JSON files are used both to allow a high degree of configurability, and to have easily-composable test sequences. The whole testbench revolves around a set of invariants cast in a publisher-subscriber architecture, and is so flexible that performing hardware-in-the-loop tests just required a low-cost hardware interface and some glue logic. We will share our experience with the different tools adopted and the issues we have encountered in our journey..
0:00:00 Slide 1
0:01:02 Slide 2
0:05:41 Slide 3
0:07:26 Slide 4
0:09:49 Slide 5
0:11:04 Slide 6
0:12:09 Slide 7
0:13:29 Slide 8
0:15:18 Slide 9
The talk
Credits and licence
- Institution
- CERN
- Department
- FPGA Developers' Forum (FDF)
- Speaker
- Roberto Rigamonti
- Year
- 2025
- Language
- English
- Source
- CERN
- Licence
- CERN, as CERN states it. CERN's terms
- Attribution
- © CERN. CERN provides its audiovisual media free of charge for educational and informational use, credited to CERN; this lecture is shown in CERN's own player.
- Who can watch
- CERN gives no rating. Invisible Network shows it to Teens profiles and older, judged from what the source says about it. How courses are placed