About
With the increasing adoption of SoC-based systems in CERN Accelerator and Technology sector (ATS), new initiatives have been put in place to ensure that systems of similar form share as many components (hardware, gateware and software) as possible. These initiatives are grouped by the ATS SoC Framework Project, now under development. The first part of this talk gives an overview of some of the common challenges users face when using a SoC in the accelerator complex and it describes the tools the framework will provide to speed up and standardise the development of SoC-based applications.
The second part of the talk focuses on one of these initiatives, the DI/OT framework new standardized build system, which has been developed to generate boot images for these platforms. This build system is modular, expandable and designed to streamline the HDL synthesis and compilation of Xilinx SoC-based projects, with strong emphasis on re-usability and standardization. It is also CI-friendly, aligning with CERN IT's new CI4FPGA developments for CI runners and Docker images..
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0:01:58 Slide 2
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0:19:45 Slide 10
The talk
Credits and licence
- Institution
- CERN
- Department
- FPGA Developers' Forum (FDF)
- Taught by
- Irene Degl'Innocenti, André Pinho
- Year
- 2025
- Language
- English
- Source
- CERN
- Licence
- CERN, as CERN states it. CERN's terms
- Attribution
- © CERN. CERN provides its audiovisual media free of charge for educational and informational use, credited to CERN; this lecture is shown in CERN's own player.
- Who can watch
- CERN gives no rating. Invisible Network shows it to Teens profiles and older, judged from what the source says about it. How courses are placed