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Talk21 min

FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC

Matei Vasile · CERN

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About

The FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. FELIX is using RDMA through RoCE to transmit data from its host servers to the Software Readout Driver using off-the-shelf networking equipment. RDMA communication is implemented using software on both end of the links. Exploring opportunities to improve data throughput as part of the High Luminosity LHC upgrade, an implementation for RDMA support in the front-end FELIX FPGA is being developed. We present a proof-of-concept RDMA FPGA implementation, which will help inform the design of the FELIX platform for High Luminosity LHC..

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The talk

  1. FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC 2021-09-23 · 21 min · CERN's player

Credits and licence

Institution
CERN
Department
Conferences
Speaker
Matei Vasile
Year
2021
Language
English
Subjects
Physics, Engineering
Source
CERN
Licence
CERN, as CERN states it. CERN's terms
Attribution
© CERN. CERN provides its audiovisual media free of charge for educational and informational use, credited to CERN; this lecture is shown in CERN's own player.
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