# Why Chip Designers Are Adopting Silicon Photonics

An episode of [The Hardware Podcast with Fexingo: Chips, Devices, and Electronics Engineering Conversations](https://invisiblenetwork.ai/podcast/1896799982), 11 Jun 2026, 11 min.

Audio: https://audio.fexingo.com/business/the-hardware-podcast/episode-0045.mp3

Episode 45: Lucas and Luna explore the emerging field of silicon photonics—using light instead of electricity to move data inside chips. They break down a real-world case: a startup called Ayar Labs has demonstrated an optical I/O chiplet that transfers data at 4 terabits per second while cutting power consumption by 80 percent compared to traditional copper interconnects. The hosts explain how this technology sidesteps the bandwidth bottleneck that has plagued chip-to-chip communication for years, why Intel and AMD are investing heavily, and when we might see photonics in consumer devices. No hype, just the engineering trade-offs that matter. #SiliconPhotonics #OpticalI/O #ChipDesign #AyarLabs #Intel #AMD #BandwidthBottleneck #DataCenter #Technology #Semiconductor #Photonics #Chiplet #Interconnect #FiberOptic #Laser #Modulator #FexingoBusiness #BusinessPodcast Keep every episode free: buymeacoffee.com/fexingo

## Transcript

Lucas: You've probably heard that chip performance keeps growing, but there's a hidden bottleneck that's been getting worse every year: moving data between chips. Copper wires just can't keep up with the bandwidth demands of modern processors.
Luna: Right — we've talked about interconnects before, but this is the physical limit. Electrons in copper generate heat and hit resistance, and at high frequencies, signal integrity degrades.
Lucas: Exactly. That's why a growing number of chip designers are turning to a technology called silicon photonics. Instead of electrical signals, they use pulses of light to transmit data — through microscopic optical waveguides etched right into the silicon.
Luna: So, light instead of electricity. What's the big advantage? I know fiber optics have been used for long-haul telecom for decades, but bringing that inside a chip package is a different ballgame.
Lucas: It's a completely different ballgame. The key metric here is bandwidth density — how many gigabits per second you can push through a given cross-sectional area. With copper, you're limited by crosstalk and power dissipation. With photonics, you can pack multiple wavelengths onto a single waveguide using wavelength division multiplexing — think of it as different colors of light traveling in the same fiber, each carrying its own data stream.
Luna: And that multiplies the bandwidth without multiplying the physical channels. How much of a jump are we talking?
Lucas: Let's look at a real example. A startup called Ayar Labs, based in California, has demonstrated an optical I/O chiplet that delivers 4 terabits per second of bandwidth. That's four million megabits per second. And it does so while consuming about 80 percent less power than a comparable electrical interconnect. The power savings come because you're moving photons, not electrons — there's no resistive heating, no dielectric loss.
Luna: Eighty percent less power is huge, especially in data centers where cooling costs are a massive expense. So how does the actual chip work? I assume you can't just slap a laser on a standard CMOS chip.
Lucas: That's the engineering challenge. Silicon itself doesn't emit light efficiently — it's an indirect bandgap material. So the typical approach is to integrate a laser source, often a iii v semiconductor laser like indium phosphide, onto the silicon photonic chip. Then you need modulators to encode data onto the light, and photodetectors to convert light back to electricity at the receiver end.
Luna: So they're hybrid chips — iii v lasers on a silicon photonics platform. That sounds expensive and complex from a manufacturing standpoint.
Lucas: It is, but the industry is investing heavily. Intel has been working on integrated photonics for over a decade. They've demonstrated a silicon photonics engine with eight lasers integrated on a single chip. AMD is also involved — they've partnered with Ayar Labs to explore optical interconnects for future high-performance computing systems. And imec, the Belgian research institute, has a dedicated silicon photonics program.
Luna: And the payoff? What's the killer app that makes this worth the manufacturing complexity?
Lucas: The killer app right now is in data centers and AI accelerators. When you're training large language models or running massive simulations, you need to move terabytes of data between GPUs and memory. With copper, the bandwidth-distance product is limited — you can't run a high-speed electrical signal more than a few centimeters without serious signal degradation. Optical links can go meters, even tens of meters, with much lower loss.
Luna: So it enables disaggregated architectures — you can physically separate compute and memory, pool resources, and scale more flexibly. That's a game changer for cloud providers.
Lucas: Exactly. And the benefits go beyond just bandwidth. Because power is so much lower, you also reduce thermal throttling. Chips can run closer to their peak frequency for longer. That's a direct performance gain.
Luna: But when will we see this in consumer devices? Like, is my laptop going to have photonic interconnects anytime soon?
Lucas: Probably not for a few years. The cost and packaging complexity are still too high for consumer price points. But we're already seeing early deployment in hyperscale data centers. Microsoft, for example, has been testing optical interconnects in some of its data center fabrics. The timeline for widespread adoption might be three to five years for high-end servers, and maybe a decade for consumer laptops.
Luna: That's a long horizon, but the direction is clear. And I imagine there are some fundamental physics limits on the photonics side too — like, can you keep shrinking the waveguides indefinitely?
Lucas: There are limits. One is the diffraction limit of light — you can't confine light to a channel smaller than roughly half its wavelength in the material. For typical near-infrared wavelengths around 1300 or 1550 nanometers, that limits waveguide dimensions to about 500 nanometers. That's much bigger than the 7-nanometer or 3-nanometer transistor gates we're used to. So photonic circuits will always be larger than electronic circuits for the same function.
Luna: So they're not a replacement for transistors — they're a complement specifically for communication, not computation.
Lucas: Exactly right. And that's fine, because the bottleneck is communication, not computation. Another challenge is coupling efficiency — getting light from the laser into the waveguide, and from the waveguide into a fiber, without losing too much signal. Ayar Labs uses a grating coupler, which is a kind of diffraction grating etched into the silicon, to steer light vertically into a fiber. But even with that, there are insertion losses.
Luna: And those losses add up. But presumably, the power savings from optical transmission outweigh the losses at the coupling interfaces — otherwise no one would bother.
Lucas: Exactly. The net power savings are still dramatic. And researchers are improving coupling efficiency every year. There's also work on micro-ring modulators, which are tiny ring-shaped waveguides that can be tuned to modulate light at very high speeds — 50 GHz or more. That's the kind of progress that makes this technology viable.
Luna: Fascinating. One thing I've been wondering — how do you test and debug a photonic chip? You can't just probe optical signals with an oscilloscope probe like you would an electrical node.
Lucas: Great question. Testing is one of the unsolved challenges in silicon photonics. You need specialized optical probing stations with fiber arrays and photodetectors. And because the waveguides are sensitive to alignment, you can't just drop a probe anywhere. Some companies are developing built-in self-test circuits with integrated photodetectors and reference lasers, so the chip can report its own optical performance. But it's still an expensive, slow process compared to electrical testing.
Luna: So that's another barrier to scaling — testing cost. But given the potential payoff, I can see why companies like Intel are willing to invest in the manufacturing infrastructure to bring costs down.
Lucas: And it's not just Intel. There's a whole ecosystem growing: foundries like Tower Semiconductor and GlobalFoundries now offer silicon photonics platforms. Startups like Lightmatter and Celestial AI are building optical interconnects specifically for AI accelerators. The US government is even funding photonics research through the CHIPS Act, recognizing it as a strategic technology for semiconductor competitiveness.
Luna: It really seems like optical interconnects are moving from research lab to production line. I'm curious about one more thing — how does this compare to the copper interconnects we talked about in episode 31? Back then, we focused on the limit of RC delay in metal wires. Photonics essentially bypasses that by using photons instead of electrons.
Lucas: Right — RC delay is the product of resistance and capacitance in the wire, and it gets worse as wires get thinner and longer. Photons don't experience RC delay at all. The latency of an optical link is essentially the speed of light in the material, which is about 200,000 kilometers per second in silicon dioxide. So for chip to chip distances, you're looking at picoseconds of latency, compared to nanoseconds for electrical signals.
Luna: That's a thousand times faster. No wonder companies are racing to commercialize this.
Lucas: Yeah. And it's not just speed — it's also about energy per bit. A typical electrical SerDes link today might consume 10 to 20 picojoules per bit. Optical links are already below 5 picojoules per bit, and researchers are targeting 1 picojoule per bit. In a data center with millions of links, that energy saving is enormous.
Luna: So the trajectory is clear: photonics will first take over the highest-bandwidth, most power-sensitive links in data centers, then trickle down to shorter interconnects over time.
Lucas: Exactly. And I think we'll see it in some consumer products sooner than you might think — not in the main processor, but in specialty devices like VR headsets or high-end gaming consoles that need massive bandwidth for video streaming and sensor data. Meta already has a research team working on integrated photonics for AR glasses.
Luna: That would require incredibly compact, low-power photonics — probably a decade away, but the direction is set.
Lucas: Quick honest thing — a handful of listeners chip in monthly through buy me a coffee dot com slash fexingo, and that's literally what funds making as many of these deep dives as we do, without any ads.
Luna: Yeah — we keep the show ad-free because of that support. If you find these engineering conversations useful, it's a simple way to keep them coming.
Lucas: And we really appreciate it. So, to wrap up the photonics discussion: I think the biggest takeaway is that silicon photonics isn't a replacement for electronics — it's a specialized solution to a specific, growing problem. And it's one of the most exciting areas in semiconductor technology right now.
Luna: Agreed. Thanks, Lucas. And thanks to our listeners.

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