# How Chips Use On-Chip Optical Interconnects for Speed

An episode of [The Hardware Podcast with Fexingo: Chips, Devices, and Electronics Engineering Conversations](https://invisiblenetwork.ai/podcast/1896799982), 21 Jul 2026, 8:13.

Audio: https://audio.fexingo.com/business/the-hardware-podcast/episode-0124.mp3

Lucas and Luna explore how on-chip optical interconnects are breaking the bandwidth bottleneck in data centers and AI accelerators. They focus on a specific 2025 breakthrough: a CMOS-compatible silicon photonic transceiver from a joint Ayar Labs and Intel prototype, capable of 2 Tbps per fiber. Lucas explains why electrical interconnects hit a wall around 50 pJ/bit, while optical links drop below 1 pJ/bit. Luna questions integration challenges—thermal stability, laser packaging—and Lucas walks through the hybrid laser bonding technique. They tie it to the exploding demand for memory bandwidth in large language model training, and discuss why this tech is finally ready for production, with volume sampling expected in 2027. No fluff, just concrete engineering. #OnChipOpticalInterconnects #SiliconPhotonics #AyarLabs #Intel #DataCenter #AIAccelerators #BandwidthBottleneck #CMOSCompatible #HybridLaserBonding #MemoryBandwidth #LLMTraining #2Tbps #PhotonicTransceiver #ChipletInterconnect #Technology #Engineering #FexingoBusiness #BusinessPodcast Keep every episode free: buymeacoffee.com/fexingo

## Transcript

Lucas: Let's talk about one of the quietest revolutions in computing: getting data off a chip using light instead of electricity. I'm Lucas, and this is The Hardware Podcast with Fexingo.
Luna: I'm Luna. And Lucas, when you say 'off a chip,' you mean the interconnect—the physical link between a processor and memory or between chiplets?
Lucas: Exactly. The interconnect. For decades, we've pushed electrical signaling—copper traces, differential pairs, equalization—to faster and faster data rates. But we're hitting fundamental physics limits. Resistance, capacitance, signal integrity. The power per bit is plateauing around 50 picojoules for a high-speed electrical link.
Luna: Fifty picojoules per bit. That sounds tiny, but when you're moving petabytes per second across a data center, it adds up.
Lucas: Adds up to megawatts. And there's a better way: optical interconnects. Instead of electrons, you send photons down a waveguide—typically silicon nitride or silicon-on-insulator. The energy per bit can drop below 1 picojoule. That's a fifty-times efficiency gain.
Luna: And speed? The bandwidth density is dramatically higher, right?
Lucas: Right. A single optical fiber can carry many wavelengths—wavelength-division multiplexing—each modulated at tens of gigabits per second. In a 2025 prototype from Ayar Labs, working with Intel, they demonstrated a silicon photonic transceiver that hits 2 terabits per second per fiber. That's not theoretical; that's on a test board.
Luna: Two terabits per second per fiber. That's enough to stream about 250,000 HD movies simultaneously. And it's cmos compatible?
Lucas: That's the key. Ayar Labs uses a standard 300-millimeter silicon photonics process at a commercial foundry. The modulators are ring resonators—tiny rings of silicon that change their refractive index with voltage. The photodetectors are germanium-on-silicon. Both can be fabricated alongside CMOS electronics.
Luna: But the laser source—that's not silicon. Silicon is an indirect-bandgap material; it doesn't emit light efficiently. So how do you get the laser onto the chip?
Lucas: That's the hardest integration challenge. The industry has tried several approaches: hybrid lasers where you bond a iii v material like indium phosphide onto the silicon wafer; or external lasers coupled via fiber. Ayar Labs uses hybrid bonding. They take a separate indium phosphide laser bar, align it with sub-micron precision, and bond it directly to the silicon photonic die using a technique called micro-transfer printing.
Luna: Micro-transfer printing. That's fascinating. So you essentially stamp the lasers onto the chip?
Lucas: Exactly. They use a soft elastomeric stamp to pick up arrays of pre-fabricated lasers and place them onto the silicon wafer with alignment accuracy better than 500 nanometers. Then they cure it. The process is fast—thousands of lasers per hour—and it's compatible with standard CMOS fab flow.
Luna: But thermal stability is a concern. Lasers are temperature-sensitive. Their wavelength drifts with temperature. In a data center environment, that could be problematic.
Lucas: It's a real engineering challenge. The ring modulators themselves are also temperature-sensitive—their resonance frequency shifts about 1 nanometer per 10 degrees Celsius. So you need active wavelength stabilization. Typically you use a feedback loop: a small heater on the ring to tune it, and a monitor photodiode to lock it. That adds some power, but overall it's still far more efficient than electrical.
Luna: How does this affect system-level design? I'm thinking about a GPU cluster training a large language model. Those systems are already bandwidth-starved.
Lucas: They are. The memory bandwidth wall is the biggest bottleneck for AI training today. NVIDIA's H100 has about 2 terabytes per second of memory bandwidth—that's electrical, HBM3. But the interconnect between GPUs—NVLink—is also electrical, and it's limited. Optical interconnects could replace both the memory interface and the chip to chip links.
Luna: So instead of routing dozens of high-speed electrical traces, you just run a few optical fibers? That changes board design drastically.
Lucas: Completely. You eliminate the need for complex signal conditioning, retimers, equalization. The board becomes simpler, lower power, and higher bandwidth. And you can scale to many chiplets—disaggregated computing, where you have separate dies for compute, memory, and I/O, all communicating optically.
Luna: But this isn't deployed at scale yet. What's the timeline? When do we see this in production?
Lucas: Ayar Labs has been sampling their TeraPHY transceiver to select customers since 2024. They expect volume production in 2027. Intel has its own silicon photonics group, and they've demonstrated integrated optical transceivers for data center interconnects. The technology is ready; it's a matter of yield and cost.
Luna: Cost being the perennial challenge for new packaging technologies. But if the power savings are as big as you say, the total cost of ownership will drive adoption.
Lucas: Exactly. Data centers are power-constrained. If you can cut interconnect power by 50x, that pays for the photonics. And the bandwidth density is so high that you can reduce the number of fibers, simplifying cable management.
Luna: So the big picture: on-chip optical interconnects are moving from research labs to real prototypes, with the potential to transform how we build high-performance computing systems.
Lucas: That's the story. And if you found this useful, you know, this is exactly the kind of deep-dive engineering conversation we try to bring every week. Keeping it ad-free is important to us, and the way that works is listener support. If you'd like to help, you can find us at buy me a coffee dot com slash fexingo.
Luna: Yeah, it's a small gesture that makes a big difference. And it keeps these conversations going.
Lucas: Absolutely. So back to the tech—one other aspect I didn't mention: reliability. Lasers have finite lifetimes. But the industry has been qualifying these hybrid lasers for telecom for years. They're seeing mean time between failures in the millions of hours.
Luna: That's on par with other data center components. So it's not a showstopper.
Lucas: Not at all. And with multiple vendors—Ayar Labs, Intel, Cisco, IBM—all working on silicon photonics, we're going to see rapid cost reduction.
Luna: What about the software stack? Does the system software need to change to take advantage of optical interconnects?
Lucas: To a first order, the hardware looks like any other high-speed link. The physical layer is different, but the protocol layers—PCI Express, CXL, Ethernet—they're the same. So the software impact is minimal. The benefit is just lower latency and higher bandwidth, transparently.
Luna: That's a powerful value proposition. You get a drop-in upgrade that saves power and increases performance.
Lucas: Exactly. And that's why I think we'll see optical interconnects in mainstream data centers by the end of the decade. It's one of those rare technologies where the physics, the economics, and the manufacturing readiness all align.
Luna: So for anyone building next-gen AI hardware, this is definitely something to keep an eye on.
Lucas: No question. I'll put links to Ayar Labs and Intel silicon photonics in the show notes if you want to dive deeper.

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