# ARM Based Development

- Institution: IIT Madras
- Department: Electronics & Communication Engineering
- Teacher: S.Chandramouleeswaran
- Level: Undergraduate
- Language: English
- Subjects: Engineering, Society and politics
- Source: [NPTEL](https://nptel.ac.in/courses/117106111)
- Licence: [CC BY-NC-SA](https://nptel.ac.in/faq) (Non-commercial use only.)
- Syllabus: [at the source](https://nptel.ac.in/courses/117106111)
- Who can watch: Teens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

## Lectures

1. [Types of computer Architectures, ISA's and ARM History](https://invisiblenetwork.ai/learn/nptel/117106111/c7066d5c214c) (Video)
2. [Embedded System Software and Hardware, stack implementation in ARM, Endianness, condition codes](https://invisiblenetwork.ai/learn/nptel/117106111/f5a4ed858967) (Video)
3. [Processor core VS CPU core, ARM7TDMI Interface signals, Memory Interface, Bus Cycle types, Register set, Operational Modes](https://invisiblenetwork.ai/learn/nptel/117106111/b253a2bab50b) (Video)
4. [Instruction Format, ARM Core Data Flow Model, ARM 3 stage Pipeline, ARM family attribute comparision](https://invisiblenetwork.ai/learn/nptel/117106111/d8fe5e87cc21) (Video)
5. [ARM 5 stage Pipeline, Pipeline Hazards, Data forwarding - a hardware solution](https://invisiblenetwork.ai/learn/nptel/117106111/bd85693d11a4) (Video)
6. [ARM ISA and Processor Variants, Different Types of Instructions, ARM Instruction set, data processing instructions](https://invisiblenetwork.ai/learn/nptel/117106111/b516c8303448) (Video)
7. [Shift Operations, shift Operations using RS lower byte, Immediate value encoding](https://invisiblenetwork.ai/learn/nptel/117106111/0ec8a14b53f6) (Video)
8. [Dataprocessing Instructions](https://invisiblenetwork.ai/learn/nptel/117106111/65f4ad015186) (Video)
9. [AddressingMode-1, Addressing Mode -2](https://invisiblenetwork.ai/learn/nptel/117106111/0d045229426c) (Video)
10. [Addressing Mode -2, LDR/STR, Addressing mode -3 with examples](https://invisiblenetwork.ai/learn/nptel/117106111/da53a1bd1207) (Video)
11. [Instruction Timing, Addressing Mode - 4 with Examples](https://invisiblenetwork.ai/learn/nptel/117106111/c76a1ef12713) (Video)
12. [Swap Instructions, Swap Register related Instructions, Loading Constants](https://invisiblenetwork.ai/learn/nptel/117106111/6b805eee2604) (Video)
13. [Program Control Flow, Control Flow Instructions, B & BL instructions, BX instruction](https://invisiblenetwork.ai/learn/nptel/117106111/cb83b3ce4ad6) (Video)
14. [Interrupts and Exceptions, Exception Handlers, Reset Handling](https://invisiblenetwork.ai/learn/nptel/117106111/0e94311a8777) (Video)
15. [Aborts, software Interrupt Instruction, undefined instruction exception](https://invisiblenetwork.ai/learn/nptel/117106111/176c5703cf37) (Video)
16. [Interrupt Latency, Multiply Instructions, Instruction set examples](https://invisiblenetwork.ai/learn/nptel/117106111/1eb44e069da9) (Video)
17. [Thumb state, Thumb Programmers model, Thumb Implementation, Thumb Applications](https://invisiblenetwork.ai/learn/nptel/117106111/7a77876fef63) (Video)
18. [Thumb Instructions, Interrupt processing](https://invisiblenetwork.ai/learn/nptel/117106111/2320320f4fb3) (Video)
19. [Interrupt Handelling schemes, Examples of Interrupt Handlers](https://invisiblenetwork.ai/learn/nptel/117106111/30b6d9c2b67b) (Video)
20. [Coprocessors](https://invisiblenetwork.ai/learn/nptel/117106111/562f2c6b0672) (Video)
21. [Coprocessor Instructions, data Processign Instruction, data transfers, register transfers](https://invisiblenetwork.ai/learn/nptel/117106111/9db2e1269f54) (Video)
22. [Number representations, floating point representation](https://invisiblenetwork.ai/learn/nptel/117106111/5cd64f04a41a) (Video)
23. [Flynn's Taxonomy, SIMD and Vector Processors, Vector Floating Point Processor (VFP), VFP and ARM interactions, An example vector operation](https://invisiblenetwork.ai/learn/nptel/117106111/4da1b4a8578b) (Video)
24. [Memory Technologies, Need for memory Hierarchy, Hierarchical Memory Organization, Virtual Memory](https://invisiblenetwork.ai/learn/nptel/117106111/9bf5e2f6c32a) (Video)
25. [Cache Memory, Mapping Functions](https://invisiblenetwork.ai/learn/nptel/117106111/8dffefeb2d29) (Video)
26. [Cache Design, Unified or split cache, multiple level of caches, ARM cache features, coprocessor 15 for system control](https://invisiblenetwork.ai/learn/nptel/117106111/c940ace422c2) (Video)
27. [Processes, Memory Map, Protected Systems, ARM systems with MPU, memory Protection Unit (MPU)](https://invisiblenetwork.ai/learn/nptel/117106111/427a14ac153f) (Video)
28. [MMU Advantage, virtual memory translation, Multitasking with MMU, MMU organization, Tightly coupled Memory (TCM)](https://invisiblenetwork.ai/learn/nptel/117106111/63c05775a70e) (Video)
29. [Physical Vs Virtual Memory, Paging, Segmentation](https://invisiblenetwork.ai/learn/nptel/117106111/83fd97720836) (Video)
30. [ARM Development Environment, Arm Procedure Call Standard (APCS),](https://invisiblenetwork.ai/learn/nptel/117106111/0aac6e287427) (Video)
31. [Example C program](https://invisiblenetwork.ai/learn/nptel/117106111/020bfcbcd14a) (Video)
32. [Embedded software Development, Image structure, linker inputs and outputs, memory map, application startup](https://invisiblenetwork.ai/learn/nptel/117106111/694b9789ddf8) (Video)
33. [AMBA Overview, Typical AMAB Based Microcontroller, AHB bus features, AHB Bus transfers, APB bus transfers, APB bridge](https://invisiblenetwork.ai/learn/nptel/117106111/599a671625e6) (Video)
34. [DMA, Peripherals, Programming Peripherals in ARM](https://invisiblenetwork.ai/learn/nptel/117106111/7ae318145565) (Video)
35. [DMA:Direct Memory Access](https://invisiblenetwork.ai/learn/nptel/117106111/6195b2d6bc32) (Video)
36. [Protocols (I2c, SPI), UART, GPIO](https://invisiblenetwork.ai/learn/nptel/117106111/273dbc88c0dc) (Video)
37. [ARM ISAs, ARMv5, ARMv6, ARM v7, big.little technology, ARMv8](https://invisiblenetwork.ai/learn/nptel/117106111/16f71313800c) (Video)