# Advanced VLSI Design

- Institution: IIT Bombay
- Department: Electronics & Communication Engineering
- Taught by: Prof. D.K. Sharma, Prof. Sachin Patkar, Prof. Virendra Singh, Prof. A.N. Chandorkar
- Level: Undergraduate
- Language: English
- Subjects: Engineering, Society and politics
- Source: [NPTEL](https://nptel.ac.in/courses/117101004)
- Licence: [CC BY-NC-SA](https://nptel.ac.in/faq) (Non-commercial use only.)
- Syllabus: [at the source](https://nptel.ac.in/courses/117101004)
- Who can watch: Teens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

## Lectures

1. [L1-Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design](https://invisiblenetwork.ai/learn/nptel/117101004/d55b4ce339dd) (Video)
2. [L2-Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design - Part II](https://invisiblenetwork.ai/learn/nptel/117101004/8df5d8fbe114) (Video)
3. [L3-Logical Effort - A way of Designing Fast CMOS Circuits](https://invisiblenetwork.ai/learn/nptel/117101004/5684fb1af09a) (Video)
4. [L4-Logical Effort - A way of Designing Fast CMOS Circuits continued](https://invisiblenetwork.ai/learn/nptel/117101004/8e1c8c776cda) (Video)
5. [L5-Logical Effort - A way of Designing Fast CMOS Circuits -Part III](https://invisiblenetwork.ai/learn/nptel/117101004/3030c70a4442) (Video)
6. [L6-Power Estimation and Control in CMOS VLSI circuits](https://invisiblenetwork.ai/learn/nptel/117101004/f8de2ef43461) (Video)
7. [L7-Power Estimation and Control in CMOS VLSI circuits continued](https://invisiblenetwork.ai/learn/nptel/117101004/7568f0410c70) (Video)
8. [L8-Low Power Design Techniques](https://invisiblenetwork.ai/learn/nptel/117101004/26888b3b0f6d) (Video)
9. [L9-Low Power Design Techniques -Part II](https://invisiblenetwork.ai/learn/nptel/117101004/7f8fe1093b54) (Video)
10. [L10-Arithmetic Implementation Strategies for VLSI](https://invisiblenetwork.ai/learn/nptel/117101004/a9facc7d97e7) (Video)
11. [L11-Arithmetic Implementation Strategies for VLSI -Part II](https://invisiblenetwork.ai/learn/nptel/117101004/447b0678b137) (Video)
12. [L12-Arithmetic Implementation Strategies for VLSI -Part III](https://invisiblenetwork.ai/learn/nptel/117101004/58f3b8b89d46) (Video)
13. [L13-Arithmetic Implementation Strategies for VLSI -Part IV](https://invisiblenetwork.ai/learn/nptel/117101004/4dc60f3e6142) (Video)
14. [L14-Interconnect aware design: Impact of scaling, buffer insertion and inductive peaking](https://invisiblenetwork.ai/learn/nptel/117101004/97adb141bf9b) (Video)
15. [L15-Interconnect aware design: Low swing and Current mode signaling](https://invisiblenetwork.ai/learn/nptel/117101004/d059ef02fc98) (Video)
16. [L16-Interconnect aware design: capacitively coupled interconnects](https://invisiblenetwork.ai/learn/nptel/117101004/40fffbac6df6) (Video)
17. [L17-Introduction to Hardware Description Languages](https://invisiblenetwork.ai/learn/nptel/117101004/6496a53b328c) (Video)
18. [L18-Managing concurrency and time in Hardware Description Languages](https://invisiblenetwork.ai/learn/nptel/117101004/6a19441b486c) (Video)
19. [L19-Introduction to VHDL](https://invisiblenetwork.ai/learn/nptel/117101004/a8f357c7885c) (Video)
20. [L20-Basic Components in VHDL](https://invisiblenetwork.ai/learn/nptel/117101004/bb4d07987d24) (Video)
21. [L21-Structural Description in VHDL](https://invisiblenetwork.ai/learn/nptel/117101004/4f32fc2d5280) (Video)
22. [L22-Behavioral Description in VHDL](https://invisiblenetwork.ai/learn/nptel/117101004/a12683a970cf) (Video)
23. [L23-Introduction to Verilog](https://invisiblenetwork.ai/learn/nptel/117101004/d0b4a6446255) (Video)
24. [L24-FSM + datapath (GCD example)](https://invisiblenetwork.ai/learn/nptel/117101004/f3d22c607743) (Video)
25. [L25-FSM + datapath (continued)](https://invisiblenetwork.ai/learn/nptel/117101004/93ed510620ff) (Video)
26. [L26-Single Cycle MMIPS](https://invisiblenetwork.ai/learn/nptel/117101004/940c1cd50ed9) (Video)
27. [L27-Multicycle MMIPS](https://invisiblenetwork.ai/learn/nptel/117101004/08af1b28a49b) (Video)
28. [L28-Multicycle MMIPS – FSM](https://invisiblenetwork.ai/learn/nptel/117101004/69b1e484e7ec) (Video)
29. [L29-Brief Overview of Basic VLSI Design Automation Concepts](https://invisiblenetwork.ai/learn/nptel/117101004/cc6379926c6e) (Video)
30. [L30-Netlist and System Partitioning](https://invisiblenetwork.ai/learn/nptel/117101004/7d6daacfef11) (Video)
31. [L31-Timing Analysis in the context of Physical Design Automation](https://invisiblenetwork.ai/learn/nptel/117101004/616dd6b03acd) (Video)
32. [L32-Placement algorithm](https://invisiblenetwork.ai/learn/nptel/117101004/63e69bf5e691) (Video)
33. [L33-Introduction to VLSI Testing](https://invisiblenetwork.ai/learn/nptel/117101004/6cd33a4ac0be) (Video)
34. [L34-VLSI Test Basics - I](https://invisiblenetwork.ai/learn/nptel/117101004/c4669704e2d4) (Video)
35. [L35-VLSI Test Basics - II](https://invisiblenetwork.ai/learn/nptel/117101004/2332c2976a35) (Video)
36. [L36-VLSI Testing: Automatic Test Pattern Generation](https://invisiblenetwork.ai/learn/nptel/117101004/d6dcd299e9ee) (Video)
37. [L37-VLSI Testing: Design for Test (DFT)](https://invisiblenetwork.ai/learn/nptel/117101004/b01f260bd067) (Video)
38. [L38-VLSI Testing: Built-In Self-Test (BIST)](https://invisiblenetwork.ai/learn/nptel/117101004/b55dfb2f725f) (Video)
39. [L39-VLSI Design Verification: An Introduction](https://invisiblenetwork.ai/learn/nptel/117101004/ceada69fb083) (Video)
40. [L40-VLSI Design Verification: An Introduction](https://invisiblenetwork.ai/learn/nptel/117101004/5f34c6513bb4) (Video)
41. [L41-VLSI Design Verification: Equivalence/Model Checking](https://invisiblenetwork.ai/learn/nptel/117101004/91ae2b73d4e3) (Video)
42. [L42-VLSI Design Verification: Model Checking](https://invisiblenetwork.ai/learn/nptel/117101004/db8514a9b445) (Video)