# System Design through Verilog

- Institution: IIT Guwahati
- Department: Electrical Engineering
- Teacher: Prof. Shaik Rafi Ahamed
- Level: Undergraduate
- Language: English
- Subjects: Engineering
- Source: [NPTEL](https://nptel.ac.in/courses/108103179)
- Licence: [CC BY-NC-SA](https://nptel.ac.in/faq) (Non-commercial use only.)
- Syllabus: [at the source](https://nptel.ac.in/courses/108103179)
- Who can watch: Tweens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

A comprehensive resource on Verilog HDL for beginners and experts large and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL). A designer aspiring to master this versatile language must first become familiar with its constructs, practice their use in real applications, and apply them in combinations in order to be successful. Design Through Verilog HDL affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool.

INTENDED AUDIENCE : Undergraduate, post graduate students, faculty and industry people

PREREQUISITES : Digital Circuits

INDUSTRIES SUPPORT : Cadence/Mentor graphics

## Lectures

1. [Lec 1: Verilog Operators and Modules](https://invisiblenetwork.ai/learn/nptel/108103179/fa1518a255c2) (YouTube)
2. [Lec 2: Verilog Ports, Data types and Assignments](https://invisiblenetwork.ai/learn/nptel/108103179/d6b1b18a3190) (YouTube)
3. [Lec 3: Basics of gate level modeling](https://invisiblenetwork.ai/learn/nptel/108103179/7956741726e7) (YouTube)
4. [Lec 4: Half adder, full adder and ripple carry adder](https://invisiblenetwork.ai/learn/nptel/108103179/b0d1a32a9697) (YouTube)
5. [Lec 5: Parallel adder/subtractor](https://invisiblenetwork.ai/learn/nptel/108103179/57ab8a79b0fc) (YouTube)
6. [Lec 6: Multiplier and comparator](https://invisiblenetwork.ai/learn/nptel/108103179/870a97a61479) (YouTube)
7. [Lec 7: Decoder, encoder and multiplexer](https://invisiblenetwork.ai/learn/nptel/108103179/42c6648910f5) (YouTube)
8. [Lec 8: Demultiplexer, read only memory](https://invisiblenetwork.ai/learn/nptel/108103179/29b934c3456d) (YouTube)
9. [Lec 9: Review of flip-flops](https://invisiblenetwork.ai/learn/nptel/108103179/fe92bd722677) (YouTube)
10. [Lec 10: Verilog modeling of flip-flops](https://invisiblenetwork.ai/learn/nptel/108103179/76703c7c5a4f) (YouTube)
11. [Lec 11: Modeling of CMOS gates and Boolean functions](https://invisiblenetwork.ai/learn/nptel/108103179/502b0023eab3) (YouTube)
12. [Lec 12: Modeling using transmission gates, CMOS delay times](https://invisiblenetwork.ai/learn/nptel/108103179/799d3edf41cb) (YouTube)
13. [Lec 13: Signal strengths](https://invisiblenetwork.ai/learn/nptel/108103179/ed4264621691) (YouTube)
14. [Lec 14: Basics of dataflow modeling](https://invisiblenetwork.ai/learn/nptel/108103179/c745c2e5f782) (YouTube)
15. [Lec 15: Examples of dataflow modeling](https://invisiblenetwork.ai/learn/nptel/108103179/3027c9237031) (YouTube)
16. [Lec 16: Basics of behavioral modeling](https://invisiblenetwork.ai/learn/nptel/108103179/e6d590626e6f) (YouTube)
17. [Lec 17: Examples of behavioral modeling](https://invisiblenetwork.ai/learn/nptel/108103179/7f99968f4518) (YouTube)
18. [Lec 18: Verilog modeling of counters](https://invisiblenetwork.ai/learn/nptel/108103179/3e776d29f698) (YouTube)
19. [Lec 19: Verilog modeling of sequence detector](https://invisiblenetwork.ai/learn/nptel/108103179/a9817622a5b1) (YouTube)
20. [Lec 20: Verilog modeling FSMs and shift registers](https://invisiblenetwork.ai/learn/nptel/108103179/7ab1626e58e7) (YouTube)
21. [Lec 21: Combinational circuit examples](https://invisiblenetwork.ai/learn/nptel/108103179/3c31ae762448) (YouTube)
22. [Lec 22: Sequential circuit examples](https://invisiblenetwork.ai/learn/nptel/108103179/0c16d6ad2a1b) (YouTube)
23. [Lec 23: Arithmetic and Logic Unit (ALU)](https://invisiblenetwork.ai/learn/nptel/108103179/140e11447b61) (YouTube)
24. [Lec 24: Static RAM and Braun Multiplier](https://invisiblenetwork.ai/learn/nptel/108103179/03dda73f3ee0) (YouTube)
25. [Lec 25: FIR filter implementation](https://invisiblenetwork.ai/learn/nptel/108103179/d39dcfc25911) (YouTube)
26. [Lec 26: Baugh-Wooley signed multiplier architecture](https://invisiblenetwork.ai/learn/nptel/108103179/41bb70e1a86e) (YouTube)
27. [Lec 27: IIR filter implementation](https://invisiblenetwork.ai/learn/nptel/108103179/1c213ca9d047) (YouTube)