# Optimization Techniques for Digital VLSI Design

- Institution: IIT Guwahati
- Department: Electrical Engineering
- Taught by: Prof. Chandan Karfa, Prof. Santosh Biswas
- Level: Undergraduate
- Language: English
- Subjects: Engineering
- Source: [NPTEL](https://nptel.ac.in/courses/108103108)
- Licence: [CC BY-NC-SA](https://nptel.ac.in/faq) (Non-commercial use only.)
- Syllabus: [at the source](https://nptel.ac.in/courses/108103108)
- Who can watch: Tweens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

## Lectures

1. [Introduction to Digital VLSI Design Flow](https://invisiblenetwork.ai/learn/nptel/108103108/b733d968352a) (Video)
2. [High-level Synthesis (HLS) flow with an example](https://invisiblenetwork.ai/learn/nptel/108103108/6c224be40fb4) (Video)
3. [Automation of High-level Synthesis Steps](https://invisiblenetwork.ai/learn/nptel/108103108/29526481a5e2) (Video)
4. [Impact of Coding Style on HLS Results](https://invisiblenetwork.ai/learn/nptel/108103108/b7316ea9d685) (Video)
5. [Impact of Compiler Optimizations on HLS Results](https://invisiblenetwork.ai/learn/nptel/108103108/cdf28292100a) (Video)
6. [RTL Optimizations for Timing](https://invisiblenetwork.ai/learn/nptel/108103108/a35195f11bc4) (Video)
7. [Retiming](https://invisiblenetwork.ai/learn/nptel/108103108/0fbb188da59b) (Video)
8. [RTL Optimizations for Area](https://invisiblenetwork.ai/learn/nptel/108103108/f8924f796194) (Video)
9. [RTL Optimizations for Power](https://invisiblenetwork.ai/learn/nptel/108103108/949d12ead837) (Video)
10. [High Level Synthesis: Introduction to Logic Synthesis](https://invisiblenetwork.ai/learn/nptel/108103108/a65e36e045a8) (Video)
11. [Overview of FPGA Technology Mapping](https://invisiblenetwork.ai/learn/nptel/108103108/cdc0a0753a52) (Video)
12. [Introduction to Physical Synthesis](https://invisiblenetwork.ai/learn/nptel/108103108/66e4b6d2dba1) (Video)
13. [Introduction to Digital VLSI Testing-I](https://invisiblenetwork.ai/learn/nptel/108103108/9be259dd0b30) (Video)
14. [Introduction to Digital VLSI Testing-II](https://invisiblenetwork.ai/learn/nptel/108103108/cea9a2a55e90) (Video)
15. [Optimization Techniques for ATPG](https://invisiblenetwork.ai/learn/nptel/108103108/f90e9826a417) (Video)
16. [Optimization Techniques for ATPG \[Part II\]](https://invisiblenetwork.ai/learn/nptel/108103108/e6d2285a9bdc) (Video)
17. [Optimization Techniques for Design for Testability](https://invisiblenetwork.ai/learn/nptel/108103108/d574bffafafb) (Video)
18. [High-level fault modeling and RTL level Testing](https://invisiblenetwork.ai/learn/nptel/108103108/ef80c06e0888) (Video)
19. [LTL/CTL based Verification](https://invisiblenetwork.ai/learn/nptel/108103108/bd605b9c2c10) (Video)
20. [Verification of Large Scale Systems](https://invisiblenetwork.ai/learn/nptel/108103108/ffff401e6a6c) (Video)
21. [BDD based verification](https://invisiblenetwork.ai/learn/nptel/108103108/de5257250c53) (Video)
22. [Verification: ADD based verification, HDD based verification](https://invisiblenetwork.ai/learn/nptel/108103108/493deba07fb8) (Video)
23. [Verification: Symbolic Model Checking](https://invisiblenetwork.ai/learn/nptel/108103108/e20268d0c62c) (Video)
24. [Verification: Bounded Model Checking](https://invisiblenetwork.ai/learn/nptel/108103108/2380ff1f6c21) (Video)