# C-Based VLSI Design

- Institution: IIT Guwahati
- Department: Computer Science and Engineering
- Teacher: Prof. Chandan Karfa
- Level: Undergraduate
- Language: English
- Subjects: Computer science, Engineering
- Source: [NPTEL](https://nptel.ac.in/courses/106103229)
- Licence: [CC BY-NC-SA](https://nptel.ac.in/faq) (Non-commercial use only.)
- Syllabus: [at the source](https://nptel.ac.in/courses/106103229)
- Who can watch: Tweens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

This course discussed how a C code can be automatically translated into register transfer level (RTL) design using high-level synthesis (HLS). HLS is an active domain of research in recent times in the domain of electronic Design Automation (EDA) of VLSI. This course will help the student to: (i) understand the overall HLS flow, (ii) how a C-code will be converted to its equivalent hardware, (iii) how to write c-code for efficient hardware generation and (iv) how the common software compiler optimization can help to improve the circuit performance. Also, advanced topics like HLS for FPGA targets, HLS for Security, optimizations at RTL level and verification challenges of HLS will be covered. This course will help the student to take up research in the domain of HLS. Also, this course will help the student to become proficient for EDA industries.

Intended audience: Final year BTech Student, MTech and PhD students, engineers from VLSI industries

Prerequisites: Basic knowledge of digital design Basic knowledge of Data structures and algorithmsBasic knowledge of Verilog. The students may go through the first six lectures of https://nptel.ac.in/courses/106/105/106105083/ to learn Verilog.

## Lectures

1. [Lec 1: Introduction to C-Based VLSI Design](https://invisiblenetwork.ai/learn/nptel/106103229/5847e5a32ce7) (YouTube)
2. [Lec 2: C-based VLSI Design: An Overview](https://invisiblenetwork.ai/learn/nptel/106103229/c81019283795) (YouTube)
3. [Lec 3: C-based VLSI Design: Problem Formulation](https://invisiblenetwork.ai/learn/nptel/106103229/73a4a69b42d7) (YouTube)
4. [Lec 4: C-based VLSI Design: Course Plan](https://invisiblenetwork.ai/learn/nptel/106103229/060aaa3d0337) (YouTube)
5. [Lec 1: Introduction to Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/150b011c84d2) (YouTube)
6. [Lec 2: ILP formulation of Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/e56aa1cd4cea) (YouTube)
7. [Lec 3: ILP formulation of MRLC and MLRC Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/f57f50d6325e) (YouTube)
8. [Lec 1: Multiprocessor Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/5d87ca3e2d66) (YouTube)
9. [Lec 2: Hu’s algorithm for Multiprocessor Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/7d5b33b7160c) (YouTube)
10. [Lec 3: List based Scheduling of MLRC](https://invisiblenetwork.ai/learn/nptel/106103229/c06a0fd8c2cc) (YouTube)
11. [Lec 4: List based Scheduling of MRLC](https://invisiblenetwork.ai/learn/nptel/106103229/948ac93a0a32) (YouTube)
12. [Lec1: Forced Directed Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/e2c8fcf97392) (YouTube)
13. [Lec2: Forced Directed MLRC and MRLC Scheduling Algorithm](https://invisiblenetwork.ai/learn/nptel/106103229/0f28600e8504) (YouTube)
14. [Lec3: Path Based Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/0e0867568a96) (YouTube)
15. [Lec4: Path Based Scheduling](https://invisiblenetwork.ai/learn/nptel/106103229/5e5adabc86d7) (YouTube)
16. [Lec 1: Allocation and Binding Problem Formulation](https://invisiblenetwork.ai/learn/nptel/106103229/6f2290695f33) (YouTube)
17. [Lec 2: Left Edge Algorithm](https://invisiblenetwork.ai/learn/nptel/106103229/b2abfec07ea2) (YouTube)
18. [Lec 3: ILP Based Formulation](https://invisiblenetwork.ai/learn/nptel/106103229/76d644ed8d07) (YouTube)
19. [Lec 4: Allocation and Binding of Hierarchical Graph](https://invisiblenetwork.ai/learn/nptel/106103229/2538d80fb392) (YouTube)
20. [Lec 1: Register Allocation and Binding](https://invisiblenetwork.ai/learn/nptel/106103229/7745532925f1) (YouTube)
21. [Lec 2: Multi-port Binding Problem](https://invisiblenetwork.ai/learn/nptel/106103229/1deba1b31c80) (YouTube)
22. [Lec 3: Data-path and Controller Synthesis](https://invisiblenetwork.ai/learn/nptel/106103229/9df0a229794e) (YouTube)
23. [Lec 1: HLS for Arrays](https://invisiblenetwork.ai/learn/nptel/106103229/e388a3e96719) (YouTube)
24. [Lec 2: HLS for Loops](https://invisiblenetwork.ai/learn/nptel/106103229/a5df143591eb) (YouTube)
25. [Lec3: HLS for Loop - pipeline](https://invisiblenetwork.ai/learn/nptel/106103229/22f07ea5e195) (YouTube)
26. [Lec1: Hardware Efficient C Coding](https://invisiblenetwork.ai/learn/nptel/106103229/d1931b0b66d8) (YouTube)
27. [Lec2: Hardware Efficient C Coding – part II](https://invisiblenetwork.ai/learn/nptel/106103229/bd6352fb7a9b) (YouTube)
28. [Lec3: Dataflow Optimization in HLS](https://invisiblenetwork.ai/learn/nptel/106103229/66ae7c6bbb36) (YouTube)
29. [Tutorial 1 - High-Level Synthesis with Vivado HLS](https://invisiblenetwork.ai/learn/nptel/106103229/355625a21a71) (YouTube)
30. [Tutorial 2 - High-Level Synthesis Optimizations with Vivado HLS](https://invisiblenetwork.ai/learn/nptel/106103229/797adc4ebd77) (YouTube)
31. [Lec1: Frontend Optimizations in C](https://invisiblenetwork.ai/learn/nptel/106103229/5a0bbf09dd0d) (YouTube)
32. [Lec 2: HLS Optimizations: Case Study 1](https://invisiblenetwork.ai/learn/nptel/106103229/674b9bf9f765) (YouTube)
33. [Lec 3: HLS Optimizations: Case Study 2](https://invisiblenetwork.ai/learn/nptel/106103229/edb400aa679b) (YouTube)
34. [Lec 1: Simulation Based Verification](https://invisiblenetwork.ai/learn/nptel/106103229/7a055805081d) (YouTube)
35. [Lec 2: RTL to C Reverse Engineering](https://invisiblenetwork.ai/learn/nptel/106103229/0bd8a58c703b) (YouTube)
36. [Lec 3: Phase-wise Verification of HLS](https://invisiblenetwork.ai/learn/nptel/106103229/5d589ac711e1) (YouTube)
37. [Lec 4: Equivalence between C and RTL](https://invisiblenetwork.ai/learn/nptel/106103229/9d1bb8d65a28) (YouTube)
38. [Lec 1: Introduction to Hardware Security](https://invisiblenetwork.ai/learn/nptel/106103229/2cab1f64c9ff) (YouTube)
39. [Lec 2: HLS for Security](https://invisiblenetwork.ai/learn/nptel/106103229/18b7f3fee129) (YouTube)
40. [Lec 3: Attacks on RTL Logic locking](https://invisiblenetwork.ai/learn/nptel/106103229/69a4117e958b) (YouTube)
41. [Lec 1: Introduction to Logic Synthesis](https://invisiblenetwork.ai/learn/nptel/106103229/6ceb90f76bd9) (YouTube)
42. [Lec 2: FPGA Technology Mapping](https://invisiblenetwork.ai/learn/nptel/106103229/69ceb4010561) (YouTube)
43. [Lec 3: Introduction to Physical Synthesis](https://invisiblenetwork.ai/learn/nptel/106103229/afef1819b26f) (YouTube)
44. [Lec 4: Introduction to Circuit optimizations](https://invisiblenetwork.ai/learn/nptel/106103229/d50152a48ed0) (YouTube)
45. [Lec 5: Recent Advances in C-Based VLSI Design](https://invisiblenetwork.ai/learn/nptel/106103229/243d28001139) (YouTube)