# Parallel computing with RISC-V vectors (lecture)

- Institution: CERN
- Speaker: Airat Galiamov
- Year: 2026
- Language: English
- Subjects: Computer science
- Source: [CERN](https://videos.cern.ch/record/3023638)
- Licence: [CERN](https://copyright.web.cern)
- Who can watch: Tweens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

For faster computing it is necessary to utilize data parallelism. The tools available for programmers for parallel computing depend on hardware and CPUs architecture. The RISC-V architecture provides a vector processor style Single Instruction, Multiple Data (SIMD) instruction. The proposed 1 hour lecture will include: - Concept of parallel data processing. Classification of various approaches. - Overview of an array processor and vector processor approach. How these theoretical approaches are used for vectorization in CPUs and GPUs. - Description of how SIMD is implemented in x86 architecture; its features, advantages and problems. - Description of how RISC-V "V" extension is implementing scalable vectorization; it's features, problems and advantages over x86 architecture approach. - Examples of vectorizations done by compiler and necessary manual vectorizations.

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## Lectures

1. [Parallel computing with RISC-V vectors (lecture)](https://invisiblenetwork.ai/learn/cern/3023638/05f911f9c155), 48 min (CERN's player)