# A Sub-Picosecond Digitally-Controlled Phase Delay

- Institution: CERN
- Department: Conferences
- Speaker: Yahya Tousi
- Year: 2021
- Language: English
- Subjects: Physics, Engineering
- Source: [CERN](https://videos.cern.ch/record/3018163)
- Licence: [CERN](http://copyright.web.cern.ch)
- Who can watch: Tweens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

The use of precision timing measurements will be a major tool at the HL-LHC, where it will be used to suppress pile-up and to search for long-lived particles. To control a reference clock with sub-picosecond accuracy, we have fabricated in the TSMC 65nm process a digitally controlled phase shifter. It is composed of a chain of 66 cells, each with a digitally controlled planar wave guide with either a short or long delay. With this a reference clock's phase can be controlled to a precision of 200 fs with dynamic range of 13 ps..

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## Lectures

1. [A Sub-Picosecond Digitally-Controlled Phase Delay](https://invisiblenetwork.ai/learn/cern/3018163/909166600669), 22 min (CERN's player)