# High-Level Synthesis for Machine Learning

- Institution: CERN
- Department: FPGA Developers' Forum (FDF)
- Speaker: Nicolo Ghielmetti
- Year: 2024
- Language: English
- Subjects: Computer science
- Source: [CERN](https://videos.cern.ch/record/3010574)
- Licence: [CERN](http://copyright.web.cern.ch)
- Who can watch: Tweens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

hls4ml (High Level Synthesis for Machine Learning) is a tool for translating Neural Networks to synthesizable gateware for FPGAs. The tool is Python software that presents a user-friendly interface to achieve efficient Machine Learning inference in hardware. hls4ml interfaces to the main ML training libraries, as well as their extensions targeting quantized NNs. At the backend of hls4ml are HLS implementations of Neural Network operations targeting high performance for latency, throughput, and power usage. HLS workflows of multiple vendors are supported. In this talk we present the status of the project, recent developments, and future plans..

0:00:00 Slide 1

0:01:37 Slide 2

0:02:48 Slide 3

0:04:09 Slide 4

0:05:43 Slide 5

0:07:30 Slide 6

0:08:46 Slide 7

0:09:54 Slide 8

0:12:19 Slide 9

0:14:04 Slide 10

0:15:08 Slide 11

0:16:41 Slide 12

## Lectures

1. [High-Level Synthesis for Machine Learning](https://invisiblenetwork.ai/learn/cern/3010574/4f8902030203), 23 min (CERN's player)