# Hardware Acceleration Through FPGAs - Basics of VHDL (lecture 2)

- Institution: CERN
- Department: Inverted CSC
- Speaker: Giorgio Lopez
- Year: 2019
- Language: English
- Subjects: Computer science
- Source: [CERN](https://videos.cern.ch/record/3006490)
- Licence: [CERN](http://copyright.web.cern.ch)
- Who can watch: Tweens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

FPGAs are a more and more ubiquitous technology. They offer the benefits of fast, application-tailored hardware, typically associated with ASICs, while enabling fast prototyping, upgradability and low costs. This makes them an ideal ally in HEP computing, specifically in areas where high performance is needed and/or specifications and needs may vary.

The lectures will focus on the intrinsic parallel processing characteristics of FPGAs, emphasizing how they can be exploited to implement data-intensive algorithms. Focus will also be put on concepts like hardware/software partitioning (very important to help the most performing parts of the systems in collaborating with the legacy CPU oriented codebase).

A simple hands on exercises session will be added to let the students get acquainted with the main tools and the VHDL language..

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## Lectures

1. [Hardware Acceleration Through FPGAs - Basics of VHDL (lecture 2)](https://invisiblenetwork.ai/learn/cern/3006490/2c67cd6b0ad3), 59 min (CERN's player)