# Tutorial on SoC Co-Simulation

- Institution: CERN
- Department: System-on-Chip
- Taught by: Hamza Boukabache, Clyde Laforge
- Year: 2024
- Language: English
- Source: [CERN](https://videos.cern.ch/record/3003935)
- Licence: [CERN](http://copyright.web.cern.ch)
- Who can watch: Teens profiles and older (sources give no ratings; placed by Invisible Network from the source's own words)

A comprehensive co-simulation framework for System-on-Chip (SoC) serves as an invaluable tool for testing and verifying heterogeneous designs that incorporate complex HDL (Hardware Description Language) and operating systems under real-world conditions. This approach facilitates an in-depth exploration of the interactions between HDL, software, and real-world scenarios in ways that are unattainable through other means, while also streamlining the debugging process on actual hardware platforms. In this presentation, we will showcase the implementation of co-simulation within the CROME system, employing a combination of a mixed-language RTL (Register Transfer Level) simulator, libsystemctlm, and QEMU. We will elucidate how these components integrate, highlight the compromises involved, and provide guidance on developing a similar co-simulation environment for your projects..

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## Lectures

1. [Tutorial on SoC Co-Simulation](https://invisiblenetwork.ai/learn/cern/3003935/955521744744), 40 min (CERN's player)